1. Field of the Invention
This invention relates generally to digital signal processing, and more specifically relates to a convolutional coder and Viterbi decoder used in a radio communication apparatus.
2. Description of the Background Art
In general, error correcting systems such as convolutional coding, Bose-Chaudhuri-Hocquenghem coding (BCH) or Reed Solomon (RS) coding are well known in the field of radio communications. In radio communication systems, digital signals to be transmitted must be error coded so that the receiver can decode them accurately. Error coding is required because bit errors occur due to noise interference and similar phenomenon whenever signals are transmitted over radio channels.
Convolutional coding is one of the error correcting systems that relates a current signal with past signals by using at least one generator polynominal. If two generator polynominals are used, the system is referred to as rate xc2xd convolutional coding, and the coded output data is double the input data. Furthermore, if three generator polynominals are used, the system is referred to as rate ⅓ convolutional coding, and the coded output data is triple the input data. Therefore, the more numerous the coded output data is, the more accurate the error correcting ability at a decoder of a receiver is. In radio communication systems, it is necessary to select a convolutional coding rate in consideration of both the transmission quality and transmission efficiency.
FIGS. 4(a) and 4(b) show a conventional convolutional coder and a conventional Viterbi decoder. In FIG. 4(a), the conventional convolutional coder includes a selector 23, a rate xc2xd convolutional coder 24, a rate ⅓ convolutional coder 25 and a selector 26. The conventional convolutional coder selects either the rate xc2xd convolutional coder 24 or the rate ⅓ convolutional coder 25 in response to convolutional coding rates (R=xc2xd or R=⅓). In FIG. 4(b), the Viterbi decoder includes a selector 33, a rate xc2xd Viterbi decoder 34, a rate ⅓ Viterbi decoder 35 and a selector 36. The Viterbi decoder selects either the rate xc2xd Viterbi decoder 34 or the rate ⅓ Viterbi decoder 35 in response to convolutional coding rates. Therefore, a conventional radio transceiver having the two convolutional coders and the two Viterbi decoders becomes large-sized and complicated.
Therefore, it is an object of the present invention to provide an improved convolutional coder performing a plurality of convolutional coding rates. Another object of the present invention is to provide an improved Viterbi decoder performing a Viterbi decoding of the convolutional coded signal with different convolutional coding rates.
To accomplish these objectives, a convolutional coder for performing a rate 1/N convolutional coding and a rate 1/M convolutional coding, where M and N are positive integers and M less than N. The convolutional coder includes a convolutional code generator, a parallel/serial converter, a rate indicator and a selector. The convolutional code generator generates respectively N convolutional coding bits based on N generator polynominals. The parallel/serial converter converts the convolutional coding bits to a serial convolutional coding sequence. The rate indicator indicates a convolutional coding rate of either the rate 1/N convolutional coding or rate 1/M convolutional coding. The selector provides the N convolutional coding bits when performing rate 1/N convolutional coding. Also, the selector provides M convolutional coding bits generated by the M generator polynominals common to the rate 1/N convolutional coding and the rate 1/M convolutional coding and nullifies the (Nxe2x88x92M) convolutional coding bits generated by other (Nxe2x88x92M) generator polynominals for rate 1/N convolutional coding when performing the rate 1/M convolutional coding.
Furthermore, to accomplish these objectives, a Viterbi decoder for performing a rate 1/N convolutional decoding, where N is a positive integer, includes a rate indicator and a data converter. The rate indicator detects a 1/N or 1/M convolutional coding rate from a received signal having rate information provided by a convolutional coder and provides an instruction based on the detected convolutional coding rate, where M is a positive integer and M less than N. The data converter provides to a Viterbi decoding circuit N convolutional coding bits generated by N generator polynominals for the rate 1/N convolutional coding when the instruction from the rate indicator corresponds to the detected 1/N convolutional coding rate. Also the data converter provides to the Viterbi decoding circuit M convolutional coding bits generated by M generator polynominals common to the rate 1/N convolutional coding and the rate 1/M convolutional coding and replaces the other (Nxe2x88x92M) convolutional coding bits with nullified data when the instruction from the rate indicator corresponds to the detected 1/M convolutional coding rate.